61sn97QNFUL._UF350,350_QL50_.jpg。61XhLs20GrL._UF350,350_QL50_.jpg。Digital Control Engineering: Analysis and Design: Fadali, M。Digital Systems Design Using Verilog: Roth, Charles, John。ハードカバー洋書.天・小口・地・見返しにシミがあります.書き込みはありません.\r\rlogic modules RTL FPGA CPLD ASIC\r\rDigital System Designs and Practices using Verilog HDL and FPGAs